// Subcircuits for use in the AMI06 technology
simulator lang=spectre

subckt buffer VDD VSS in out
parameters wp=3u wn=1.5u ln=600n lp=600n mult=1
	I0 (VDD VSS in temp) ccInverter
	I1 (VDD VSS temp out) ccInverter
ends buffer

subckt bufferf16 VDD VSS in out
parameters wp=3u wn=1.5u ln=600n lp=600n mult=1
	I0 (VDD VSS in temp) ccInverter wp=12u wn=6u
	I1 (VDD VSS temp out) ccInverter wp=48u wn=12u
ends bufferf16

subckt ccInverter VDD VSS in out 
parameters wp=3u wn=1.5u ln=600n lp=600n mult=1
    MP (out in VDD VDD) ami06P w=wp l=lp as=1.5u*wp ad=1.5u*wp ps=3u+wp \
        pd=3u+wp m=mult 
    MN (out in VSS VSS) ami06N w=wn l=ln as=1.5u*wn ad=1.5u*wn ps=3u+wn \
        pd=3u+wn m=mult
ends ccInverter

subckt tgate VDD VSS in out pass
parameters wp=3u wn =1.5u ln=600n lp=600n mult=1
   I3 (VDD VSS pass pass_inv) ccInverter
   N0 (in pass out VSS) ami06N w=wn l=ln as=2.25e-12 ad=2.25e-12 ps=6u \
           pd=6u m=mult region=sat
   P0 (out pass_inv in VDD) ami06P w=wp l=lp as=4.5e-12 ad=4.5e-12 ps=9u \
           pd=9u m=mult region=sat
ends tgate

subckt tGateMux VDD VSS in0 in1 select out
parameters wp=3u wn=1.5u ln=600n lp=600n mult=1
   I0 (VDD VSS in0 outtemp selectPrime) tgate mult=mult
   I1 (VDD VSS in1 outtemp select) tgate mult=mult
   B0 (VDD VSS outtemp out) buffer
   I2 (VDD VSS select selectPrime) ccInverter mult=mult
ends tGateMux

subckt mux4to1 in00 in01 in10 in11 out Select0 Select1 VDD VSS
parameters wp=3u wn=1.5u ln=600n lp=600n mult=1
   I0 (VDD VSS in00 in01 Select0 IOout) tGateMux mult=mult
   I1 (VDD VSS in10 in11 Select0 I1out) tGateMux mult=mult
   //Inv0 (VDD VSS IOout I0inv) ccInverter
   //Inv1 (VDD VSS I0inv A0) ccInverter wp=12u wn=6u
   //Inv2 (VDD VSS I1out I1inv) ccInverter
   //Inv3 (VDD VSS I1inv A1) ccInverter wp=12u wn=6u
   I2 (VDD VSS I0out I1out Select1 out) tGateMux mult=mult
ends mux4to1

subckt ece3663MUX2to1 VDD VSS in0 in1 Select out
parameters wp=3u wn=1.5u ln=600n lp=600n mult=1
	I0 (VDD VSS Select selectBar) ccInverter wn=wn wp=wp mult=mult
	P5 (net15 Select VDD VDD) ami06P w=wp l=lp as=1.5u*wp ad=1.5u*wp ps=3u+wp pd=3u+wp m=mult
	P4 (net15 in1 VDD VDD) ami06P w=wp l=lp as=1.5u*wp ad=1.5u*wp ps=3u+wp pd=3u+wp m=mult
	P3 (out net15 VDD VDD) ami06P w=wp l=lp as=1.5u*wp ad=1.5u*wp ps=3u+wp pd=3u+wp m=mult
	P2 (out net31 VDD VDD) ami06P w=wp l=lp as=1.5u*wp ad=1.5u*wp ps=3u+wp pd=3u+wp m=mult
	P1 (net31 in0 VDD VDD) ami06P w=wp l=lp as=1.5u*wp ad=1.5u*wp ps=3u+wp pd=3u+wp m=mult
	P0 (net31 selectBar VDD VDD) ami06P w=wp l=lp as=1.5u*wp ad=1.5u*wp ps=3u+wp pd=3u+wp m=mult
	N5 (net35 net15 VSS VSS) ami06N w=wn*2 l=ln as=1.5u*2*wn ad=1.5u*2*wn ps=3u+wn*2 pd=3u+wn*2 m=mult
	N4 (out net31 net35 VSS) ami06N w=wn*2 l=ln as=1.5u*2*wn ad=1.5u*2*wn ps=3u+wn*2 pd=3u+wn*2 m=mult
	N3 (net43 Select VSS VSS) ami06N w=wn*2 l=ln as=1.5u*2*wn ad=1.5u*2*wn ps=3u+wn*2 pd=3u+wn*2 m=mult
	N2 (net15 in1 net43 VSS) ami06N w=wn*2 l=ln as=1.5u*2*wn ad=1.5u*2*wn ps=3u+wn*2 pd=3u+wn*2 m=mult
	N1 (net31 selectBar net55 VSS) ami06N w=wn*2 l=ln as=1.5u*2*wn ad=1.5u*2*wn ps=3u+wn*2 pd=3u+wn*2 m=mult
	N0 (net55 in0 VSS VSS) ami06N w=wn*2 l=ln as=1.5u*2*wn ad=1.5u*2*wn ps=3u+wn*2 pd=3u+wn*2 m=mult
ends ece3663MUX2to1

subckt ece3663mux4to1 in00 in01 in10 in11 Select0 Select1 out
VDD VSS
parameters wp=3u wn=1.5u ln=600n lp=600n mult=1
   I0 (VDD VSS in00 in01 Select0 I0out) ece3663MUX2to1 wn=wn wp=wp mult=mult
   
   I1 (VDD VSS in10 in11 Select0 I1out) ece3663MUX2to1 wn=wn wp=wp mult=mult
   
   I2 (VDD VSS I0out I1out Select1 out) ece3663MUX2to1 wn=wn wp=wp mult=mult
ends ece3663mux4to1

subckt ccShifter A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 out0 out1 out2 out3 out4 out5 out6 out7 out8 out9 out10 out11 out12 out13 out14 out15 B0 B1 VDD VSS
	B1 (VDD VSS VSS out0) bufferf16
	mux8 (A7 A6 A5 A4 S0 S1 out8 VDD VSS) ece3663mux4to1
	mux9 (A8 A7 A6 A5 S0 S1 out9 VDD VSS) ece3663mux4to1
	mux10 (A9 A8 A7 A6 S0 S1 out10 VDD VSS) ece3663mux4to1
	mux11 (A10 A9 A8 A7 S0 S1 out11 VDD VSS) ece3663mux4to1
	mux15 (A14 A13 A12 A11 S0 S1 out15 VDD VSS) ece3663mux4to1
	mux14 (A13 A12 A11 A10 S0 S1 out14 VDD VSS) ece3663mux4to1
	mux13 (A12 A11 A10 A9 S0 S1 out13 VDD VSS) ece3663mux4to1
	mux12 (A11 A10 A9 A8 S0 S1 out12 VDD VSS) ece3663mux4to1
	mux4 (A3 A2 A1 A0 S0 S1 out4 VDD VSS) ece3663mux4to1
	mux5 (A4 A3 A2 A1 S0 S1 out5 VDD VSS) ece3663mux4to1
	mux6 (A5 A4 A3 A2 S0 S1 out6 VDD VSS) ece3663mux4to1
	mux7 (A6 A5 A4 A3 S0 S1 out7 VDD VSS) ece3663mux4to1
	mux3 (A2 A1 A0 VSS S0 S1 out3 VDD VSS) ece3663mux4to1
	mux1 (A0 VSS VSS VSS S0 S1 out1 VDD VSS) ece3663mux4to1
	mux2 (A1 A0 VSS VSS S0 S1 out2 VDD VSS) ece3663mux4to1
	I0 (VDD VSS B0 invB0) ccInverter
	I1 (VDD VSS invB0 S0) ccInverter wp=12u wn=6u
	I2 (VDD VSS B1 invB1) ccInverter
	I3 (VDD VSS invB1 B1t) ccInverter
	I4 (VDD VSS B1t invB1t) ccInverter
	I5 (VDD VSS invB1t S1) ccInverter wp=6u wn=3u
	//S0 1,4
	//S1 1,1,1,2
ends ccShifter	
// End of subcircuit definition.
